388 skills found · Page 1 of 13
Nic30 / HdlConvertorFast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4
Buck008 / Transformer Accelerator Based On FPGAYou can run it on pynq z1. The repository contains the relevant Verilog code, Vivado configuration and C code for sdk testing. The size of the systolic array can be changed, now it is 16X16.
Nic30 / HwtVHDL/Verilog/SystemC code generator, simulator API written in python/c++
snbk001 / Verilog Design ExamplesVerilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy machine and Moore machine, Number of 1s, Binary to Gray Conversion, Up down counter, Clock Divider, PIPO, n bit universal shift register, 4 bit LFSR, Single port RAM, Dual port RAM, Synchronous FIFO, Asynchronous FIFO, 8x8 Sequential Multiplier
aappleby / MetronA C++ to Verilog translation tool with some basic guarantees that your code will work.
zslwyuan / Basic SIMD Processor Verilog TutorialImplementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in this ALU. The ALU operation will take two clocks. The first clock cycle will be used to load values into the registers. The second will be for performing the operations. 6-bit opcodes are used to select the functions. The instruction code, including the opcode, will be 18-bit.
NVlabs / VerilogCoderNo description available
NXP / I3c Slave DesignMIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.
nxbyte / Verilog ProjectsThis repository contains source code for past labs and projects involving FPGA and Verilog based designs
Qucs / ADMSADMS is a code generator for some of Verilog-A
gundy / Tiny SynthVerilog code for a simple synth module; developed on TinyFPGA BX
Lcrypto / FEC Archive VerilogVerilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward Error Correction coders and decoders Hamming code, Golay code (24), 4-dimension 8-ary phase shift keying trellis coded modulation (TCM_4D_8PSK), BCH, CCSDS and recursive systematic convolutional (RSC) Turbo codes
VenciFreeman / FFT ChipDesignA 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.
simonmonk / Prog FpgasThe repository for the Verilog code examples and ISE projects that accompany the book Programming FPGAs: Getting Started with Verilog.
galacticstudios / KiCadVerilogGenerate Verilog code from a KiCad netlist
SymbiFlow / Sphinxcontrib Hdl DiagramsSphinx Extension which generates various types of diagrams from Verilog code.
AkeelMedina22 / RISC V Pipelined ProcessorA Verilog based 5-stage fully functional pipelined RISC-V Processor code.
ashishrana160796 / Verilog Starter TutorialsTutorial series on verilog with code examples. Contains basic verilog code implementations and concepts.
bunnie / Netv Fpgaverilog FPGA code for NeTV
DOUDIU / Hardware Implementation Of The Dark Channel Prior Haze Removal AlgorithmThe Dark Channel Prior technique is implemented on FPGA using only Verilog code and no Intellectual Property, making it convenient to replicate using any simulator and any of the available FPGA boards, including those from Xilinx and Altera.
