HdlConvertor
Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4
Install / Use
/learn @Nic30/HdlConvertorREADME
hdlConvertor
This library is a System Verilog and VHDL parser, preprocessor and code generator for Python/C++. It contains:
- ANTLR4 generated VHDL/(System) Verilog parser with full language support.
- Convertors from raw VHDL/SV AST to universal HDL AST (hdlConvertor::hdlAst and it's python equivalent.).
- Convertors from this HDL AST to SV/VHDL/JSON and other formats.
- Compiler focused utils for manipulation with HDL AST.
- HdlAstVisitor, id resolution, sensitivity detection, vhdl <-> verilog type conversion, ...

Supported languages:
- IEEE 1076-2008 (VHDL 2008) and all previous standard, (currently without
tool_directiveandPSL) - [IEEE 1076-2019] WIP
- IEEE 1800-2017 (SystemVerilog 2017) and all previous standards.
Installation
Linux: Installing dependencies (Ubuntu 24.04)
# gcc>=13, Visual Studio 2017 or equivalent recommended
sudo apt install build-essential uuid-dev cmake default-jre python3 python3-dev python3-pip ninja-build
Installing this library
# python recommends to use venv (virtualenv) https://docs.python.org/3/library/venv.html
# sudo pip3 install venv
# python3 -m venv myvenv
# source myvenv/bin/activate
# note this may be older version than you see in repo
pip3 install hdlConvertor
# or download repository and run
pip3 install --upgrade --force-reinstall --no-cache-dir git+https://github.com/Nic30/hdlConvertorAst.git # optionally
pip3 install .
You can also install only C++ library/generate .deb package (nothing specific, just normal cmake-based library)
meson setup build -Dpython_package=false
ninja -C build
For dev purposes also this link could be useful https://meson-python.readthedocs.io/en/latest/how-to-guides/meson-args.html#how-to-guides-meson-args
Usage
The HDL AST (the parsed code) is represented by objects from hdlConvertor.hdlAst. Parsing and code modification is straightforward, as you can see in following example
Similar projects:
(Tell us If you know about some other project!)
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- ieee1800_2017 - Java, SystemVerilog preprocessor
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- Pyverilog - python verilog toolkit
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