5 skills found
manili / VSDBabySoCVSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.
vsdip / Rvmyth Avsddac InterfaceNo description available
ShonTaware / FPGA Design Fabric ArchitectureThis repository contains all the information studied and created during the FPGA - Fabric, Design and Architecture workshop. It is primarily focused on a complete FPGA flow using the maximum open-source tools.
infini8-13 / Riscv Ms SocA RISC-V Mixed Signal System-on-Chip(SoC) produced by integrating RVMyth RISC-V Core with Phase Locked Loop(PLL) as a clock multiplier
vsdip / Rvmyth Avsdpll InterfaceNo description available
