83 skills found · Page 1 of 3
JulianKemmerer / PipelineCA C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
hunterlew / Convolution Network On FPGACNN acceleration on virtex-7 FPGA with verilog HDL
mtmd / FPGA Based CNNFPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.
bunny965 / Yolov5 Fpga Hardware Acceleration网络训练、图像预处理以及部分hend功能是基于pc端实现的，只有主干网络部署在fpga上，片上资源无法支持整个网络所需资源，建议添加外部存储及DDR
ingonyama-zk / Blazeblaze is a Rust library for ZK acceleration on Xilinx FPGAs.
ZcashFoundation / Zcash FpgaZcash FPGA acceleration engine
intel / Hexl FpgaIntel Homomorphic Encryption Acceleration Library for FPGAs, including open source implementation of FPGA kernels for accelerating NTT, INTT, Keyswitch and Dyadic Multiplication modular arithmetic operations, FPGA runtime, and host APIs for connecting to third-party homomorphic encryption libraries.
chili-chips-ba / OpenCologne PCIEThe first-ever opensource soft core for PCIE EndPoint. Without vendor-locked HMs for Data Link, Transaction, Application layers. With standard PIPE interface for vendor SerDes. Portable, unencrypted, free SVerilog RTL with best-in-class VIP, Slot and M.2 cards for GateMate, the project opens PCIE connectivity to FPGAs, ASICs, I/O, acceleration, AI.
Kodoh / OrderbookOpen source High-Frequency Trading Order Book with FPGA Acceleration
ConstantPark / Neural Network Acceleration 2Neural Network Acceleration using CPU/GPU, ASIC, FPGA
Xilinx / KRSThe Kria Robotics Stack (KRS) is a ROS 2 superset for industry, an integrated set of robot libraries and utilities to accelerate the development, maintenance and commercialization of industrial-grade robotic solutions while using adaptive computing.
bsdevlin / Fpga Snark ProverAn acceleration engine for proving SNARKS over the bn128 curve, targeted for AWS FPGAs
ConstantPark / Nerual Network Acceleration 1Neural Network Acceleration such as ASIC, FPGA, GPU, and PIM
microsoft / BrainsmithOpen-source AI acceleration on FPGA: from ONNX to RTL
spcl / ApfpFPGA acceleration of arbitrary precision floating point computations.
rafamedina97 / FPGA SNN STDPFPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks
andrewboutros / Rad FlowThe RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration devices (RADs). These devices incorporate conventional FPGA fabrics, several coarse-grained domain-specialized accelerator blocks, and high-performance networks-on-chip for system-level communication.
arc-research-lab / SSRSSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)
sherylll / Lenet5 AcceleratorFPGA and GPU acceleration of LeNet5
Lien182 / ReconROSEasy to use framework for ROS2 FPGA-based hardware acceleration; Supports Pub/Sub communication, Actions and Services and costum ROS Messages
