4 skills found
ys1998 / SpsimSimulator for a superscalar processor with dynamic scheduling and branch prediction
plamentrayanov / BranchingProcessSimulatorMatlab Simulator of Continuous-time Multi-type Branching Processes in Random Environment. (UPDATE: includes examples for modelling the coronavirus epidemics (COVID-19, SARS-CoV-2)))
akankshac-073 / MIPS 5 Stage Pipelined Control And DatapathImplementation of a 32-bit 5 stage Pipelined MIPS Processor using RTL coding in Verilog on ModelSim simulator. The processor datapath and control units are designed for Arithmetic and Logical instructions (all r-type instructions + addi, andi, ori, slti), Data transfer instructions (lw, sw), Branch and jump instructions (beq, j). Forwarding control, hazard detection and stalling units are also implemented to improve the efficiency of the pipeline. The designed processor can be tested by initializing the instruction memory with test instructions and obtaining the corresponding register contents by generating waveforms on ModelSim.
sopanpatra160 / OOO Superscalar Processor SimulatorA simulator for an out-of-order superscalar processor based on Tomasulo’s algorithm that fetches, dispatches and issues N instructions per cycle. Only the dynamic scheduling mechanism is modeled in detail, i.e., perfect caches and perfect branch prediction are assumed. A superscalar integrated with two level caches is also modeled.
