RISC-V Linux/XV6 SoCs

KianV SV32 (MMU) RV32IMA Zicntr Zicsr Zifencei SSTC Linux/XV6 SoC, a robust RISC-V design with full virtual memory support, seamlessly running Linux and XV6. KianV SV32 RV32IMA SoC <img src="kianv_soc_core_bus.png" alt="KianV SoC Core Bus" />

LinuxSoC V2

Here is my reworked Linux SoC, simpler, derived from my new full custom ASIC. KianV SV32 RV32IMA SoC v2

Linux ASIC Designs

Find my new full-custom RISC-V Linux KianV ASIC SoC as part of the wafer.space GF180MCU shuttle run. KianV GF180MCU <img src="chip_top_white.png" alt="KianV SoC GF180MCU ASIC" />

External Recognition

At the Linux Plumbers Conference 2025 (Tokyo), D. Jeff Dionne highlighted the recent emergence of fully open-source silicon platforms that return from fabrication and boot mainline noMMU Linux, calling this capability “incredibly powerful”.

KianV demonstrates this end-to-end workflow in practice: open-source RTL, open-source EDA and PDK (skywater130), TinyTapeout fabrication, and mainline uLinux boot on real silicon.

Reference: Linux Plumbers Conference 2025 – noMMU Linux BoF https://www.youtube.com/watch?v=_MrT5KTQfvg

Check out the nice RISC-V uLinux ASIC I built—see the article at FOSSI Foundation. <img src="ulinux_asic_tt05.jpg" alt="Kianv uLinux ASIC Soc TT05" />

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