Zilog Z80 CPU Emulator

Introduction

<img src="https://zxe.io/software/Z80/assets/images/Z80.svg" height="72" width="256" align="right">

The Z80 library implements a fast, small and accurate emulator of the Zilog Z80. It emulates all that is known to date about this CPU, including the undocumented behaviors, MEMPTR, Q and the special RESET. It also has the honor of having been the first open-source project to provide full emulation of the interrupt mode 0.

The source code is written in ANSI C for maximum portability and is extensively commented. The aim has been to write a well-structured, easy-to-understand piece of software; something solid and elegant that can stand the test of time with no need for major changes.

Accuracy

This Z80 CPU emulator has a classic design with instruction-level granularity that delivers high performance, whilst offering reasonable flexibility to achieve precision down to the T-state level.

Instruction-level granularity implies that, except in a few well-defined cases, the execution of a given instruction cannot stop until all its internal M-cycles have been processed (i.e., instructions are not divided into micro-operations). Moreover, registers are modified only once per instruction and the T-state counter is normally updated after a full instruction has been executed.

That said, instructions, flags, memory accesses, interrupts, clock cycles, etc., are accurately emulated according to the available technical documentation, the findings made after decades of research on the Z80 and electronic simulations. And, of course, the emulator passes the most exhaustive tests written to date, including all three major test suites:

<span id="major_test_suites">Zilog Z80 CPU Test Suite, by Patrik Rak</span>

This set of programs is intended to help the emulator authors to reach the desired level of the CPU emulation authenticity. Each of the included programs performs an exhaustive computation using each of the tested Z80 instructions, compares the results with values obtained from a real Sinclair ZX Spectrum 48K with Zilog Z80 CPU, and reports any deviations detected.

<details> <summary>Results (v1.0)</summary> <table> <tr> <td align="center" valign="top"> <a href="https://web.archive.org/web/20210401091605id_/http://zxds.raxoft.cz/taps/misc/z80test-1.0.zip"> <img src="https://zxe.io/software/Z80/assets/images/tap.svg" width="96"><br> <b>z80full.tap</b> </a> <br> ^{Tests all flags and registers.} </td> <td align="center" valign="top"> <a href="https://web.archive.org/web/20210401091605id_/http://zxds.raxoft.cz/taps/misc/z80test-1.0.zip"> <img src="https://zxe.io/software/Z80/assets/images/tap.svg" width="96"><br> <b>z80doc.tap</b> </a> <br> ^{Tests all registers, but only officially documented flags.} </td> </tr> <tr> <td align="center" valign="top"> <img src="https://zxe.io/software/Z80/tests/screenshots/ZX%20Spectrum/Zilog%20Z80%20CPU%20Test%20Suite%20v1.0%20%282012-12-08%29%28Rak,%20Patrik%29%20-%20Zilog%20-%20Full.gif"> </td> <td align="center" valign="top"> <img src="https://zxe.io/software/Z80/tests/screenshots/ZX%20Spectrum/Zilog%20Z80%20CPU%20Test%20Suite%20v1.0%20%282012-12-08%29%28Rak,%20Patrik%29%20-%20Zilog%20-%20Doc.gif"> </td> </tr> <tr> <td align="center" valign="top"> <a href="https://web.archive.org/web/20210401091605id_/http://zxds.raxoft.cz/taps/misc/z80test-1.0.zip"> <img src="https://zxe.io/software/Z80/assets/images/tap.svg" width="96"><br> <b>z80flags.tap</b> </a> <br> ^{Tests all flags, ignores registers.} </td> <td align="center" valign="top"> <a href="https://web.archive.org/web/20210401091605id_/http://zxds.raxoft.cz/taps/misc/z80test-1.0.zip"> <img src="https://zxe.io/software/Z80/assets/images/tap.svg" width="96"><br> <b>z80docflags.tap</b> </a> <br> ^{Tests documented flags only, ignores registers.} </td> </tr> <tr> <td align="center" valign="top"> <img src="https://zxe.io/software/Z80/tests/screenshots/ZX%20Spectrum/Zilog%20Z80%20CPU%20Test%20Suite%20v1.0%20%282012-12-08%29%28Rak,%20Patrik%29%20-%20Zilog%20-%20Flags.gif"> </td> <td align="center" valign="top"> <img src="https://zxe.io/software/Z80/tests/screenshots/ZX%20Spectrum/Zilog%20Z80%20CPU%20Test%20Suite%20v1.0%20%282012-12-08%29%28Rak,%20Patrik%29%20-%20Zilog%20-%20Doc%20Flags.gif"> </td> </tr> <tr> <td align="center" valign="top"> <a href="https://web.archive.org/web/20210401091605id_/http://zxds.raxoft.cz/taps/misc/z80test-1.0.zip"> <img src="https://zxe.io/software/Z80/assets/images/tap.svg" width="96"><br> <b>z80ccf.tap</b> </a> <br> ^{Tests all flags after executing <code>ccf</code> after each instruction tested.} </td> <td align="center" valign="top"> <a href="https://web.archive.org/web/20210401091605id_/http://zxds.raxoft.cz/taps/misc/z80test-1.0.zip"> <img src="https://zxe.io/software/Z80/assets/images/tap.svg" width="96"><br> <b>z80memptr.tap</b> </a> <br> ^{Tests all flags after executing <code>bit&nbsp;N,(hl)</code> after each instruction tested.} </td> </tr> <tr> <td align="center" valign="top"> <img src="https://zxe.io/software/Z80/tests/screenshots/ZX%20Spectrum/Zilog%20Z80%20CPU%20Test%20Suite%20v1.0%20%282012-12-08%29%28Rak,%20Patrik%29%20-%20Zilog%20-%20CCF.gif"> </td> <td align="center" valign="top"> <img src="https://zxe.io/software/Z80/tests/screenshots/ZX%20Spectrum/Zilog%20Z80%20CPU%20Test%20Suite%20v1.0%20%282012-12-08%29%28Rak,%20Patrik%29%20-%20Zilog%20-%20MEMPTR.gif"> </td> </tr> </table> </details> <details> <summary>Results (v1.2a)</summary> <table> <tr> <td align="center" valign="top"> <a href="https://web.archive.org/web/20231202140745id_/http://zxds.raxoft.cz/taps/misc/z80test-1.2a.zip"> <img src="https://zxe.io/software/Z80/assets/images/tap.svg" width="96"><br> <b>z80full.tap</b> </a> <br> ^{Tests all flags and registers.} </td> <td align="center" valign="top"> <a href="https://web.archive.org/web/20231202140745id_/http://zxds.raxoft.cz/taps/misc/z80test-1.2a.zip"> <img src="https://zxe.io/software/Z80/assets/images/tap.svg" width="96"><br> <b>z80doc.tap</b> </a> <br> ^{Tests all registers, but only officially documented flags.} </td> </tr> <tr> <td align="center" valign="top"> <img src="https://zxe.io/software/Z80/tests/screenshots/ZX%20Spectrum/Zilog%20Z80%20CPU%20Test%20Suite%20v1.2a%20%282023-12-02%29%28Rak,%20Patrik%29%20-%20Zilog%20-%20Full.gif"> </td> <td align="center" valign="top"> <img src="https://zxe.io/software/Z80/tests/screenshots/ZX%20Spectrum/Zilog%20Z80%20CPU%20Test%20Suite%20v1.2a%20%282023-12-02%29%28Rak,%20Patrik%29%20-%20Zilog%20-%20Doc.gif"> </td> </tr> <tr> <td align="center" valign="top"> <a href="https://web.archive.org/web/20231202140745id_/http://zxds.raxoft.cz/taps/misc/z80test-1.2a.zip"> <img src="https://zxe.io/software/Z80/assets/images/tap.svg" width="96"><br> <b>z80flags.tap</b> </a> <br> ^{Tests all flags, ignores registers.} </td> <td align="center" valign="top"> <a href="https://web.archive.org/web/20231202140745id_/http://zxds.raxoft.cz/taps/misc/z80test-1.2a.zip"> <img src="https://zxe.io/software/Z80/assets/images/tap.svg" width="96"><br> <b>z80docflags.tap</b> </a> <br> ^{Tests documented flags only, ignores registers.} </td> </tr> <tr> <td align="center" valign="top"> <img src="https://zxe.io/software/Z80/tests/screenshots/ZX%20Spectrum/Zilog%20Z80%20CPU%20Test%20Suite%20v1.2a%20%282023-12-02%29%28Rak,%20Patrik%29%20-%20Zilog%20-%20Flags.gif"> </td> <td align="center" valign="top"> <img src="https://zxe.io/software/Z80/tests/screenshots/ZX%20Spectrum/Zilog%20Z80%20CPU%20Test%20Suite%20v1.2a%20%282023-12-02%29%28Rak,%20Patrik%29%20-%20Zilog%20-%20Doc%20Flags.gif"> </td> </tr> <tr> <td align="center" valign="top"> <a href="https://web.archive.org/web/20231202140745id_/http://zxds.raxoft.cz/taps/misc/z80test-1.2a.zip"> <img src="https://zxe.io/software/Z80/assets/images/tap.svg" width="96