Logi7400

Logisim 7400 series integrated circuits library.

Variants

There are two variants of the library with different circuit appearances available:

• In the classic Logi7400dip library, the circuit appearance reflects the physical pin layout of the DIP packaged chips.
• The new Logi7400ic library provides a logical circuit appearance.

Goal

This library aims to be a comprehensive 7400 series library for Logisim for designing logical circuits and for educational purposes.

The library should be compatible both with original Logisim and logisim-evolution.

Lists by type

• Gates
• Inverters
• Flip-Flops and Latches
• Encoders and Decoders
• Arithmetic and Counters

Supported Chips

You're welcome to request missing chips by opening an issue.

| Chip | Description | Pins | IC | DIP | Status Docs | | ----------------------- | --------------------------------------------- |:----:| --- | --- | ------------------ | | 7400 | quad 2-input NAND gate | 14 | OK | OK | OK | | 7402 | quad 2-input NOR gate | 14 | OK | OK | OK | | 7403 | quad 2-input NAND gate, open collector output | 14 | OK | OK | OK | | 7404 | hex inverter | 14 | OK | OK | OK | | 7405 | hex inverter, open collector output | 14 | OK | OK | OK | | 7408 | quad 2-input AND gate | 14 | OK | OK | OK | | 7410 | tripe 3-input NAND gate | 14 | OK | OK | OK | | 7411 | tripe 3-input AND gate | 14 | OK | OK | OK | | 7414 | hex Schmitt trigger inverter | 14 | OK | OK | OK | | 7420 | dual 4-input NAND gate | 14 | OK | OK | OK | | 7421 | dual 4-input AND gate | 14 | OK | OK | OK | | 7427 | tripe 3-input NOR gate | 14 | OK | OK | OK | | 7430 | 8-input NAND gate | 14 | OK | OK | OK | | 7432 | quad 2-input OR gate | 14 | OK | OK | OK | | 7442 | 4-bit BCD to 10-line decoder | 16 | OK | OK | OK | | 7451 | AND-OR-invert gates | 14 | OK | OK | OK | | 7473 | dual J-K flip-flop | 14 | OK | OK | OK | | 7474 | dual D-type flip-flop | 14 | OK | OK | OK | | 7475 | quad D-type latch | 16 | OK | -- | old diagram | | 7476 | dual J-K flip-flop | 16 | OK | OK | OK | | 7485 | 4-bit magnitude comparator | 16 | OK | OK | layout missing | | 7486 | quad 2-input XOR gate | 14 | OK | OK | OK | | 7493 | 4-bit binary ripple counter | 14 | OK | -- | layout missing | | 74107 | dual J-K flip-flop | 14 | OK | -- | OK | | 74109 | dual J-not-K flip-flop | 14 | OK | OK | OK | | 74112 | dual J-K flip-flop | 16 | OK | -- | OK | | 74132 | quad 2-input NAND Schmitt trigger | 14 | OK | -- | OK | | 74137 | 3-bit to 8-line decoder, latched input | 16 | -- | -- | layout missing | | 74138 | 3-bit to 8-line decoder | 16 | OK | OK | OK | | 74139 | dual 2-bit to 4-line decoder | 16 | OK | OK | OK | | 74147 | 10-line to 4-bit BCD priority encoder | 16 | OK | OK | OK | | 74151 | 8-line multiplexer | 16 | OK | OK | OK | | 74153 | dual 4-line multiplexer | 16 | OK | OK | old diagram | | 74157 | quad 2-line multiplexer | 16 | OK | OK | old diagram | | 74161 | 4-bit synchronous binary counter | 16 | OK | OK | pin layout missing | | 74163 | 4-bit synchronous binary counter | 16 | OK | OK | pin layout missing | | 74165 | 8-bit parallel in shift register | 16 | -- | -- | missing | | 74173 | quad D-type flip-flop | 16 | OK | -- | OK | | 74174 | hex D-type flip-flop | 16 | -- | -- | missing | | 74175 | quad D-type flip-flop | 16 | OK | -- | missing | | 74181 | 4-bit arithmetic logic unit | | -- | OK | missing | | 74237 | 3-bit to 8-line decoder, latched input | 16 | -- | -- | missing | | 74238 | 3-bit to 8-line decoder | 16 | OK | OK | old diagram | | 74244 | octal buffer | 20 | OK | OK | old diagram | | 74247 | BCD to 7-segment decoder | 16 | -- | OK | pin layout missing | | 74259 | octal adressable D-type latch | | -- | -- | missing | | 74273 | octal D-type flip-flop | 20 | OK | OK | old diagram | | 74283 | 4-bit binary full adder | 16 | OK | OK | pin layout missing | | 74373 | octal transparent D-type latch | 20 | -- | OK | pin layout missing | | 74374 | octal D-type flip-flop | 20 | OK | OK | pin layout missing | | 74377 | 8-bit register with clock enable | 20 | OK | OK | missing | | 74390 | | | -- | -- | missing | | 74393 | | | -- | -- | missing | | 74534 | | | -- | -- | missing | | 74573 | 8-bit D-type latch | 20 | -- | OK | pin layout missing | | 74574 | 8-bit D-type flip-flop | 20 | -- | OK | pin layout missing | | 74595 | 8-bit shift register | 16 | -- | OK | pin layout missing | | 74670 | 4 by 4 register file | | -- | OK | missing | | 404002 | dual 4-input NOR gate | 14 | -- | -- | OK | | 744049 | hex inverter | 16 | -- | OK | pin layout missing | | 744075 | triple 3-input OR gate | 14 | -- | OK | OK | | 744511 | BCD to 7-segment decoder | 16 | -- | OK | pin layout missing | | 747266 | dual 2-input XNOR gate | 14 | -- | -- | OK |

Design Guidelines

To meet these goals, the following design guidelines are met:

• Circuits are build from a minimal set of built-in components.
• The pin layout matches the DIP pinout of the corresponding ICs.
• Automated tests are provided.
• Labels must conform to VHDL, i.e. start with a letter and contain only letters, digits, or underscores.

Credits

• logisim_74v1, Public Domain
• 7400 series Logisim library from Ben Oztalay: Provided on Logisim web site, Public Domain