PoC
The PoC Library has been forked to github.com/VHDL/PoC. See new address below
Install / Use
/learn @VLSI-EDA/PoCREADME
[!CAUTION] The PoC-Library has been forked to https://github.com/VHDL/PoC.
Further development, bug fixing and issue resolution will be handled at
github.com/VHDL/PoCowned by the Open-Source VHDL Group. All code will be checked with reworked OSVVM testbenches and checked by GHDL and NVC via GitHub Actions.
An updated documentation is published at: https://vhdl.github.io/PoC/
[!TIP] In case you liked this PoC-Library, we would be happy if you could transfer your stars (🌟) and watches (👁) to the new location.
The PoC-Library
This library is published and maintained by Chair for VLSI Design, Diagnostics and Architecture - Faculty of Computer Science, Technische Universität Dresden, Germany http://vlsi-eda.inf.tu-dresden.de

Table of Content:
- Overview
- Quick Start Guide
2.1. Requirements and Dependencies
2.2. Download
2.3. Configuring PoC on a Local System
2.4. Integration
2.5. Updating - Common Notes
- Cite the PoC-Library
1 Overview
PoC - “Pile of Cores” provides implementations for often required hardware functions such as Arithmetic Units, Caches, Clock-Domain-Crossing Circuits, FIFOs, RAM wrappers, and I/O Controllers. The hardware modules are typically provided as VHDL or Verilog source code, so it can be easily re-used in a variety of hardware designs.
All hardware modules use a common set of VHDL packages to share new VHDL types, sub-programs and constants. Additionally, a set of simulation helper packages eases the writing of testbenches. Because PoC hosts a huge amount of IP cores, all cores are grouped into sub-namespaces to build a clear hierachy.
Various simulation and synthesis tool chains are supported to interoperate with PoC. To generalize all supported free and commercial vendor tool chains, PoC is shipped with a Python based infrastructure to offer a command line based frontend.
2 Quick Start Guide
This Quick Start Guide gives a fast and simple introduction into PoC. All topics can be found in the Using PoC section at ReadTheDocs.io with much more details and examples.
2.1 Requirements and Dependencies
The PoC-Library comes with some scripts to ease most of the common tasks, like running testbenches or generating IP cores. PoC uses Python 3 as a platform independent scripting environment. All Python scripts are wrapped in Bash or PowerShell scripts, to hide some platform specifics of Darwin, Linux or Windows. See Requirements for further details.
PoC requires:
- A supported synthesis tool chain, if you want to synthezise IP cores.
- A supported simulator tool chain, if you want to simulate IP cores.
- The Python 3 programming language and runtime, if you want to use PoC's infrastructure.
- A shell to execute shell scripts:
- Bash on Linux and OS X
- PowerShell on Windows
PoC optionally requires:
- Git command line tools or
- Git User Interface, if you want to check out the latest 'master' or 'release' branch.
PoC depends on third part libraries:
- Cocotb
A coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python. - OS-VVM
Open Source VHDL Verification Methodology. - UVVM
Universal VHDL Verification Methodology. - VUnit
An unit testing framework for VHDL.
All dependencies are available as GitHub repositories and are linked to PoC as Git submodules into the
PoCRoot\lib directory. See Third Party Libraries for more details on these libraries.
2.2 Download
The PoC-Library can be downloaded as a zip-file (latest 'release' branch), cloned with git clone
or embedded with git submodule add from GitHub. GitHub offers HTTPS and SSH as transfer protocols. See
the Download page for further details. The installation directory is referred to as PoCRoot.
Protocol | Git Clone Command
-------- | :-----------------------------------------------------------
HTTPS | git clone --recursive https://github.com/VLSI-EDA/PoC.git PoC
SSH | git clone --recursive ssh://git@github.com:VLSI-EDA/PoC.git PoC
2.3 Configuring PoC on a Local System
To explore PoC's full potential, it's required to configure some paths and synthesis or simulation tool chains. The following commands start a guided configuration process. Please follow the instructions on screen. It's possible to relaunch the process at any time, for example to register new tools or to update tool versions. See Configuration for more details. Run the following command line instructions to configure PoC on your local system:
cd PoCRoot
.\poc.ps1 configure
Use the keyboard buttons: Y to accept, N to decline, P to skip/pass a step and Return to accept
a default value displayed in brackets.
2.4 Integration
The PoC-Library is meant to be integrated into other HDL projects. Therefore it's recommended to create a library folder and add the PoC-Library as a Git submodule. After the repository linking is done, some short configuration steps are required to setup paths, tool chains and the target platform. The following command line instructions show a short example on how to integrate PoC.
a) Adding the Library as a Git submodule
The following command line instructions will create the folder lib\PoC\ and clone the PoC-Library as a
Git submodule into that folder. ProjectRoot is the directory of the hosting Git. A detailed list
of steps can be found at Integration.
cd ProjectRoot
mkdir lib | cd
git submodule add https://github.com:VLSI-EDA/PoC.git PoC
cd PoC
git remote rename origin github
cd ..\..
git add .gitmodules lib\PoC
git commit -m "Added new git submodule PoC in 'lib\PoC' (PoC-Library)."
b) Configuring PoC
The PoC-Library should be configured to explore its full potential. See Configuration for more details. The following command lines will start the configuration process:
cd ProjectRoot
.\lib\PoC\poc.ps1 configure
c) Creating PoC's my_config.vhdl and my_project.vhdl Files
The PoC-Library needs two VHDL files for its configuration. These files are used to determine the most suitable implementation depending on the provided target information. Copy the following two template files into your project's source folder. Rename these files to *.vhdl and configure the VHDL constants in the files:
cd ProjectRoot
cp lib\PoC\src\common\my_config.vhdl.template src\common\my_config.vhdl
cp lib\PoC\src\common\my_project.vhdl.template src\common\my_project.vhdl
my_config.vhdl defines two global constants, which need to be adjusted:
constant MY_BOARD : string := "CHANGE THIS"; -- e.g. Custom, ML505, KC705, Atlys
constant MY_DEVICE : string := "CHANGE THIS"; -- e.g. None, XC5VLX50T-1FF1136, EP2SGX90FF1508C3
my_project.vhdl also defines two global constants, which need to be adjusted:
constant MY_PROJECT_DIR : string := "CHANGE THIS"; -- e.g. d:/vhdl/myproject/, /home/me/projects/myproje
