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Axi4lite2uart

This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.

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/learn @JoseIuri/Axi4lite2uart
About this skill

Quality Score

0/100

Supported Platforms

Universal

README

axi4lite2uart

This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.

IP Core Diagram

JoseIuri

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GitHub Stars24
CategoryDevelopment
Updated3mo ago
Forks4
JoseIuri/axi4lite2uart

Languages

SystemVerilog

Security Score

92/100

Audited on Dec 16, 2025

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