RPI5.pinout
Raspberry Pi 5 GPIO Pinout
Install / Use
/learn @Felipegalind0/RPI5.pinoutREADME
Raspberry Pi 5 Pinout
The RP1 on the RPI5 has 28 multi-functional General-Purpose Input/Output pins available on the Raspberry Pi 40-pin GPIO connector.
GPIO pins can withstand upto 5V when RP1 is powered, and 3.63V when RP1 is unpowered.
The pins are in a single electrical bank (VDDIO0). The GPIO bank (IO_BANK0) can be powered from 1.8V or 3.3V, but interface timings have been specified at 3.3V.
Each pin can be controlled directly by software, or by a number of other functional blocks.
The bank supports the following functions:
• 5 × UART
• 6 × SPI
• 4 × I2C
• 2 × I2S - 1× Clock Producer instance, 1× Clock Consumer instance.
• RIO - Registered IO interface
• 24-bit DPI output
• 4-channel PWM output
• AUDIO_OUT - Stereo PWM audio output
• GPCLK - General-purpose clock input and output
• eMMC/SDIO bus with a 4-bit interface
• Interrupt generation from pin level or edge transitions
| GPIO Number | Function | | | | | | | | | |----------|--------------|-----------|--------------|---------------|-------------|--------------|--------------|-------------|-------------| | GPIO# | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | | GPIO0 | SPI0_SIO[3] | DPI_PCLK | UART1_TX | I2C0_SDA | SYS_RIO[0] | PROC_RIO[0] | PIO[0] | SPI2_CSn[0] | | | GPIO1 | SPI0_SIO[2] | DPI_DE | UART1_RX | I2C0_SCL | SYS_RIO[1] | PROC_RIO[1] | PIO[1] | SPI2_SIO[1] | | | GPIO2 | SPI0_CSn[3] | DPI_VSYNC | UART1_CTS | I2C1_SDA | UART0_IR_RX | SYS_RIO[2] | PROC_RIO[2] | PIO[2] | SPI2_SIO[0] | | GPIO3 | SPI0_CSn[2] | DPI_HSYNC | UART1_RTS | I2C1_SCL | UART0_IR_TX | SYS_RIO[3] | PROC_RIO[3] | PIO[3] | SPI2_SCLK | | GPIO4 | GPCLK[0] | DPI_D[0] | UART2_TX | I2C2_SDA | UART0_RI | SYS_RIO[4] | PROC_RIO[4] | PIO[4] | SPI3_CSn[0] | | GPIO5 | GPCLK[1] | DPI_D[1] | UART2_RX | I2C2_SCL | UART0_DTR | SYS_RIO[5] | PROC_RIO[5] | PIO[5] | SPI3_SIO[1] | | GPIO6 | GPCLK[2] | DPI_D[2] | UART2_CTS | I2C3_SDA | UART0_DCD | SYS_RIO[6] | PROC_RIO[6] | PIO[6] | SPI3_SIO[0] | | GPIO7 | SPI0_CSn[1] | DPI_D[3] | UART2_RTS | I2C3_SCL | UART0_DSR | SYS_RIO[7] | PROC_RIO[7] | PIO[7] | SPI3_SCLK | | GPIO8 | SPI0_CSn[0] | DPI_D[4] | UART3_TX | I2C0_SDA | SYS_RIO[8] | PROC_RIO[8] | PIO[8] | SPI4_CSn[0] | | | GPIO9 | SPI0_SIO[1] | DPI_D[5] | UART3_RX | I2C0_SCL | SYS_RIO[9] | PROC_RIO[9] | PIO[9] | SPI4_SIO[0] | | | GPIO10 | SPI0_SIO[0] | DPI_D[6] | UART3_CTS | I2C1_SDA | SYS_RIO[10] | PROC_RIO[10] | PIO[10] | SPI4_SIO[1] | | | GPIO11 | SPI0_SCLK | DPI_D[7] | UART3_RTS | I2C1_SCL | SYS_RIO[11] | PROC_RIO[11] | PIO[11] | SPI4_SCLK | | | GPIO12 | PWM0[0] | DPI_D[8] | UART4_TX | I2C2_SDA | AUDIO_OUT_L | SYS_RIO[12] | PROC_RIO[12] | PIO[12] | SPI5_CSn[0] | | GPIO13 | PWM0[1] | DPI_D[9] | UART4_RX | I2C2_SCL | AUDIO_OUT_R | SYS_RIO[13] | PROC_RIO[13] | PIO[13] | SPI5_SIO[1] | | GPIO14 | PWM0[2] | DPI_D[10] | UART4_CTS | I2C3_SDA | UART0_TX | SYS_RIO[14] | PROC_RIO[14] | PIO[14] | SPI5_SIO[0] | | GPIO15 | PWM0[3] | DPI_D[11] | UART4_RTS | I2C3_SCL | UART0_RX | SYS_RIO[15] | PROC_RIO[15] | PIO[15] | SPI5_SCLK | | GPIO16 | SPI1_CSn[2] | DPI_D[12] | MIPI0_DSI_TE | UART0_CTS | SYS_RIO[16] | PROC_RIO[16] | PIO[16] | | | | GPIO17 | SPI1_CSn[1] | DPI_D[13] | MIPI1_DSI_TE | UART0_RTS | SYS_RIO[17] | PROC_RIO[17] | PIO[17] | | | | GPIO18 | SPI1_CSn[0] | DPI_D[14] | I2S0_SCLK | PWM0[2] | I2S1_SCLK | SYS_RIO[18] | PROC_RIO[18] | PIO[18] | GPCLK[1] | | GPIO19 | SPI1_SIO[1] | DPI_D[15] | I2S0_WS | PWM0[3] | I2S1_WS | SYS_RIO[19] | PROC_RIO[19] | PIO[19] | | | GPIO20 | SPI1_SIO[0] | DPI_D[16] | I2S0_SDI[0] | GPCLK[0] | I2S1_SDI[0] | SYS_RIO[20] | PROC_RIO[20] | PIO[20] | | | GPIO21 | SPI1_SCLK | DPI_D[17] | I2S0_SDO[0] | GPCLK[1] | I2S1_SDO[0] | SYS_RIO[21] | PROC_RIO[21] | PIO[21] | | | GPIO22 | SDIO0_CLK | DPI_D[18] | I2S0_SDI[1] | I2C3_SDA | I2S1_SDI[1] | SYS_RIO[22] | PROC_RIO[22] | PIO[22] | | | GPIO23 | SDIO0_CMD | DPI_D[19] | I2S0_SDO[1] | I2C3_SCL | I2S1_SDO[1] | SYS_RIO[23] | PROC_RIO[23] | PIO[23] | | | GPIO24 | SDIO0_DAT[0] | DPI_D[20] | I2S0_SDI[2] | I2S1_SDI[2] | SYS_RIO[24] | PROC_RIO[24] | PIO[24] | SPI2_CSn[1] | | | GPIO25 | SDIO0_DAT[1] | DPI_D[21] | I2S0_SDO[2] | AUDIO_IN_CLK | I2S1_SDO[2] | SYS_RIO[25] | PROC_RIO[25] | PIO[25] | SPI3_CSn[1] | | GPIO26 | SDIO0_DAT[2] | DPI_D[22] | I2S0_SDI[3] | AUDIO_IN_DAT0 | I2S1_SDI[3] | SYS_RIO[26] | PROC_RIO[26] | PIO[26] | SPI5_CSn[1] | | GPIO27 | SDIO0_DAT[3] | DPI_D[23] | I2S0_SDO[3] | AUDIO_IN_DAT1 | I2S1_SDO[3] | SYS_RIO[27] | PROC_RIO[27] | PIO[27] | SPI1_CSn[1] |
Each GPIO can have one function selected at a time. Likewise, each peripheral input (e.g. I2C3_SCL) should only be selected on one GPIO at a time. If the same peripheral input is connected to multiple GPIOs, the peripheral sees the logical OR of these GPIO inputs. Function selections without a named function in this list are reserved.
To enable a specific UART, add the corresponding overlay to /boot/config.txt. For example, to enable UART 1 on GPIOs 0 and 1, add the following line to /boot/config.txt:
dtoverlay=uart1-pi5
PCIe & NVMe
See 'github.com/m1geo/Pi5_PCIe' & datasheets.raspberrypi.com/pcie/pcie-connector-standard.pdf
UARTs
⚠️ Warning: UART does NOT work on the RPI5 from the factory.
A firmware update is required fix a known issue that prevents the dtoverlays for UARTs from working.
Fix:
Install rpi-update on Ubuntu 23.10 with the following commands:
sudo curl -L --output /usr/bin/rpi-update https://raw.githubusercontent.com/Hexxeh/rpi-update/master/rpi-update && sudo chmod +x /usr/bin/rpi-update
Then update the firmware on your RPI5 with:
sudo rpi-update
dtoverlays for I2C:
dtoverlay=i2c0-pi5,pins_8_9
dtoverlay=i2c1-pi5,pins_10_11
dtoverlay=i2c2-pi5,pins_12_13
#dtoverlay=i2c3-pi5,pins_22_23 #default 14-15: ! same as UART0
i2c An alias for i2c_arm
i2c_arm Set to "on" to enable the ARM's i2c interface
(default "off")
i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
(default "100000")
i2c_baudrate An alias for i2c_arm_baudrate
i2c_csi_dsi Set to "on" to enable the i2c_csi_dsi interface
i2c_csi_dsi0 Set to "on" to enable the i2c_csi_dsi0 interface
i2c_csi_dsi1 Set to "on" to enable the i2c_csi_dsi1 interface
i2c_vc Set to "on" to enable the i2c interface
usually reserved for the VideoCore processor
(default "off")
i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface
(default "100000")
Name: i2c0
Info: Change i2c0 pin usage. Not all pin combinations are usable on all
platforms - platforms other then Compute Modules can only use this
to disable transaction combining.
Do NOT use in conjunction with dtparam=i2c_vc=on. From the 5.4 kernel
onwards the base DT includes the use of i2c_mux_pinctrl to expose two
muxings of BSC0 - GPIOs 0&1, and whichever combination is used for the
camera and display connectors. This overlay disables that mux and
configures /dev/i2c0 to point at whichever set of pins is requested.
dtparam=i2c_vc=on will try and enable the mux, so combining the two
will cause conflicts.
Load: dtoverlay=i2c0,<param>=<val>
Params: pins_0_1 Use pins 0 and 1 (default)
pins_28_29 Use pins 28 and 29
pins_44_45 Use pins 44 and 45
pins_46_47 Use pins 46 and 47
combine Allow transactions to be combined (default
"yes")
Name: i2c0-bcm2708
Info: Deprecated, legacy version of i2c0.
Load: <Deprecated>
Name: i2c0-pi5
Info: Enable i2c0 (Pi 5 only)
Load: dtoverlay=i2c0-pi5,<param>=<val>
Params: pins_0_1 Use GPIOs 0 and 1 (default)
pins_8_9 Use GPIOs 8 and 9
baudrate Set the baudrate for the interface (default
"100000")
Name: i2c1
Info: Change i2c1 pin usage. Not all pin combinations are usable on all
platforms - platforms other then Compute Modules can only use this
to disable transaction combining.
Load: dtoverlay=i2c1,<param>=<val>
Params: pins_2_3 Use pins 2 and 3 (default)
pins_44_45 Use pins 44 and 45
combine Allow transactions to be combined (default
"yes")
Name: i2c1-bcm2708
Info: Deprecated, legacy version of i2c1.
Load: <Deprecated>
Name: i2c1-pi
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Audited on Mar 15, 2026