96 skills found · Page 2 of 4
TChapman500 / EaterCPUSimulationA simulation of Ben Eater's 8-bit CPU in Logisim Evolution (Holy Cross Edition).
semisgdh / SGDH RVSoCAn incredibly small 32-bit RISC-V rv32acim CPU capable of running Linux on FPGA, and software simulations.
xsuite / XtrackPython package for tracking simulations in particle accelerators on CPU and GPU.
OpenRealTimeSimulation / SolverCodegenC++ code generation tools for real-time CPU or FPGA simulation solvers of electrical and power electronic systems
shupx / Swarm Sync Simswarm_sync_sim (also known as sss) is an ultra-lightweight, ROS-based simulator for robotic swarms, including PX4-based multirotor UAVs, fixed-wing UAVs, Tello drones, and UGVs. It is efficient enough to run on a laptop CPU, supporting at least 10 robots with up to 10× real-time simulation speed.
AsadiAhmad / CPUCPU Simulation with Logisim for Computer Architecture Course
lcy1317 / CPUSEU COA Experimental Course CPU Simulation Code。东南大学计算机组织与结构II大作业
chaitan3 / AdFVMAdjoint capable unsteady compressible fluid dynamics simulation tool for CPUs and GPUs
nand2mario / Ao486 SimAn educational, whole-system simulation of the ao486 SystemVerilog CPU core and PC architecture
Urist-McDeveloper / Nbody2D N-body simulation on CPU and GPU
hadibrais / ArchsimA survey on architectural simulators focused on CPU caches.
sarracini / CPU Scheduling SimulationSome C programs to simulate three CPU scheduling algorithms for a multi-core computing system consisting of four homogeneous CPU’s
evenmn / Lammps Bulk BenchmarkBenchmark CPUs and GPUs by running molecular dynamics simulations in LAMMPS
BrentSeidel / Sim CPUCPU Simulations written in Ada
abdullin / Sim CpuEvent-Driven Job Scheduling Simulation for a single-CPU system
yashbonde / RNN SimRunning massive simulations using RNNs on CPUs for building bots and all kinds of things.
F35idk / Spice CpuAn analog, transistor-level simulation of an 8-bit CPU in SPICE
AMReX-Astro / EmuEmu is a neutrino quantum kinetics simulation code based on the particle in cell method and parallelized for CPU or GPU supercomputing architectures.
monsonite / Bit Serial ALUSimulations and designs for bit serial ALU implemented in TTL circuitry. Also bit serial cpu architectures - all simulated using H. Neeman's "Digital" simulator
lcodePy-team / LcodePyExperimental quasistatic plasma wakefield simulation code, 2D and 3D geometry, for CPUs and GPUs
